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new_pwm
- 一个PWM参数器，里面有所有仿真结果，在QUARTUS软件打开，自己设计的
FPGA_PWM_VHDL.rar
- FPGA_EP2C5T144C8电机控制PWM、QUARTUS II 工程文件，非文本文件！可以直接使用！,FPGA_EP2C5T144C8 motor control PWM, QUARTUS II project file, non-text files! Direct access to!
fpga-pwm
- 用verilog 语言写的FPGA子程序，环境是quartus II 7.2 已经在EP1C6Q240上测试过，源码包含仿真文件和仿真结果，本程序可以直接嵌入做子程序使用。-FPGA with the verilog language written subroutines, the environment is quartus II 7.2 has been tested on EP1C6Q240, source code contains the simulation files and s
pwm
- 在Quartus 9.0 下实现的PWM IP核设计，周期占空比均可调。-PWM IP core design,which period and duty is adjustable.
pwm-c
- 用VHDL编写的PWM控制程序，通过寄存器控制20余路PWM输出；qar是quartus的压缩包格式-VHDL prepared using PWM control procedures, through the registers to control more than 20 road PWM output qar is Quartus compressed packet format
EP1C3_12_1_2_MOTO
- 基于FPGA的直流电机的PWM控制和步进电机的细分驱动控制。使用VHDL语言编写，压缩包里是Quartus下的工程。-FPGA-based PWM DC motor control and stepper motor-driven control of a breakdown. The use of VHDL language, compression bag is under the Quartus project.
servo_module_worked
- verilog pwm to control servo motor on quartus
PWM
- verilog pwm to control servo motor on quartus, with microprocessor generated from sopc and connected with sram-verilog pwm to control servo motor on quartus
pwm
- verilog实现PWM 开发环境 QUARTUS II7.0-verilog to achieve PWM development environment QUARTUS II7.0
BLDCM
- 基于Verilog HDL的直流无刷电机控制程序，Quartus II环境下编写。-Verilog HDL for BLDCM Control in Quartus II。
components
- quartus的几个IP核（PWM,RAM,I2C）-quartus several IP core (PWM, RAM, I2C)
statemation-for-PWM-
- 基于状态机对步进电机的操作,利用VHDL语言编写，在Quartus 8.1环境下测试通过，可以建立波形文件做仿真实验-stepper motor based on ststemation
PWM-waveform
- 用Altera Quartus II 的VHDL语言完成的PWM波形产生的源代码-Altera Quartus II VHDL with the completion of the PWM waveform generation language source code
PWM_Module
- Very clean design of a PWM module made in structural VHDL. Lower blocks are behavioral.Designed in Quartus 9.0,
PWM
- 用Verilog编写的PWM产生器，已经在cyclon DE2板子上测试通过，建议用Quartus 10.1综合。-PWM generator using Verilog.
pwm
- 基于SOPC的PWM控制.quartus -PWM control based on SOPC.quartus ii
FPGA-PWM-Quartus
- 一种基于FPGA产生PWM波的Quartus程序。 包含15分频器、地址译码器、带死区的PWM发生器、计数实现的三角波发生器。-An FPGA-based PWM wave generated Quartus program. Contains 15 dividers, address decoders, PWM generator with dead counted achieve triangular wave generator.
PWM
- 用Verilog实现的脉冲宽度调制程序，在quartus平台上测试成功。(Using Verilog implementation of pulse width modulation, in quartus platform test successfully.)
PWM_Basic
- code for pwm code for pwm usnig quartus 2
PWM_last
- 在quartus中采用制作软IP核实现PWM波控制LED灯的显示(Using the soft IP in quartus to verify the display of the current PWM wave control LED lamp)